发明名称 INFORMATION PROCESSOR
摘要 PROBLEM TO BE SOLVED: To reduce the cost of the processor by providing an ATM communication means to an input output control means and an input output interface means so as to eliminate the need for complicated program processing. SOLUTION: Each section connecting to a bus 10 connected with CPU 1 and a cache memory 2 and input output devices IOa, IOb are provided in the processing unit. Furthermore, an ATM communication function section 41 of an input output interface section 4 assembles/disassembles cells in a way that a high-order address part of access address information from the CPU 1 and DMA address information from an IO control section 5 is assigned to an ATM address used for ATM communication and its address information and read write data information from the CPU 1 and the IO control section 5 are assigned to a payload in each ATM cell. Furthermore, an ATM communication function section 51 of the IO control section 5 receives an ATM cell from the function section 41 and disassembles/assembles the ATM cell in a way that read information or the like from the control section 5 is assigned to each ATM cell in the case of reply.
申请公布号 JPH09294123(A) 申请公布日期 1997.11.11
申请号 JP19960103050 申请日期 1996.04.25
申请人 HITACHI LTD 发明人 ENDO YOICHI
分类号 G06F13/28;H04L12/28;H04Q3/00;(IPC1-7):H04L12/28 主分类号 G06F13/28
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