发明名称 Semiconductor memory device having redundancy memory cells incorporated into sub memory cell blocks
摘要 In a semiconductor memory device including first and second sub blocks each having a normal memory cell array and at least one redundancy memory cell row, and first and second sub block selecting circuits for selecting the first and second sub blocks, a multiplexer is connected between the first and second sub block selecting circuits and the first and second sub blocks, and redundancy memory cell row exchanging circuits for the redundancy memory cell rows are provided. The multiplexer is controlled in accordance with the output signals of the redundancy memory cell row exchanging circuits and the block selecting circuits, and the selection of the redundancy memory cell rows.
申请公布号 US5687125(A) 申请公布日期 1997.11.11
申请号 US19960755366 申请日期 1996.11.25
申请人 NEC CORPORATION 发明人 KIKUCHI, WATARU
分类号 G11C11/413;G11C11/401;G11C29/00;G11C29/04;(IPC1-7):G11C7/00 主分类号 G11C11/413
代理机构 代理人
主权项
地址