发明名称 MULTIPLIER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide the multiplier circuit from which a desired delay signal is stably obtained by adopting a delay circuit that takes dispersion in precision, a delay time and a temperature change of each element into account. SOLUTION: The circuit is made up of an input terminal 1, delay elements 21 , 22 ,..., 2n , a selector circuit 3, an exclusive OR circuit 4, and an output terminal 5 and executes the control as shown in the following. A selector circuit 3 continues selection of delay elements started from the delay element 21 till a low level is detected from an output signal of the circuit 3 with respect to a leading edge of an input signal pulse. Let number of stages of the delay elements be Y when the low level is detected at first. Furthermore, the selector circuit 3 again continues selection of delay elements started from the delay element 2Y+1 till a low level is detected from an output signal of the circuit 3 with respect to a leading edge of a next input signal pulse. Let number of stages of the delay elements be X when the low level is again detected. Number of stages of the delay elements to extract a signal whose phase is lagged by n deg. this delay circuit is obtained by the following equation; Y×n/180-|X-Y|.
申请公布号 JPH09294058(A) 申请公布日期 1997.11.11
申请号 JP19960105507 申请日期 1996.04.25
申请人 KYOCERA CORP 发明人 KUSUMI TADAHARU
分类号 H03K5/00;(IPC1-7):H03K5/00 主分类号 H03K5/00
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