发明名称 Known good die test apparatus and method
摘要 An apparatus and method for testing an integrated circuit chip prior to mounting on a package including a non-conductive tape upon which are formed a plurality of contacts arranged in a pattern matching the arrangement of bonding pads of an integrated circuit, and a z-axis conductor placed over the conductive tape. The target chip is placed on the z-axis conductor and test signals are transmitted between the contacts on the tape and the bonding pads of the integrated circuit through conductors embedded in the z-axis conductor. In one embodiment, a glass or ceramic plate including openings, arranged in the same pattern as the bonding pads, is placed between the integrated circuit and the z-axis conductor to prevent damage to the integrated circuit.
申请公布号 US5686842(A) 申请公布日期 1997.11.11
申请号 US19950521619 申请日期 1995.08.31
申请人 LEE, SHAW WEI 发明人 LEE, SHAW WEI
分类号 G01R1/073;(IPC1-7):G01R1/073 主分类号 G01R1/073
代理机构 代理人
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