FORMING METHOD OF VIA HOLE IN THE SEMICONDUCTOR DEVICE

摘要

A method for forming via holes having improved contact resistance is disclosed. The method includes a steps of forming a via hole(1) by sequentially etching a first oxide layer(3), an SOG(Spin On Glass) layer(4) and a second oxide layer(5), and annealing the upper part of the via hole(1) using plasma process in order to remove water and -OH radical within the SOG layer(4). Thereby, it is possible to decrease the contact resistance and increase the reliability of devices.