发明名称 |
Semiconductor memory device in which a failed memory cell is replaced with another memory cell |
摘要 |
A semiconductor memory device including a memory cell array having memory cells arranged in XY directions, means for storing at least X addresses of failure bit memory cells among memory cells defined by an X address and a Y address in the memory cell array, and address means for generating an address Xe+m (m=positive or negative integer), serving as an internal address, when X address Xe corresponding to the failure bit address is inputted from an external section.
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申请公布号 |
US5684746(A) |
申请公布日期 |
1997.11.04 |
申请号 |
US19950567688 |
申请日期 |
1995.12.05 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
OOWAKI, YUKIHITO;FUKUDA, RYO |
分类号 |
G11C11/413;G11C11/401;G11C29/00;G11C29/04;G11C29/24;H01L21/82;H01L27/10;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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