Phase-locking method and a loop applying the method

摘要

The relates to locking the phase of output signal (Ys) relative to an input signal (Ye). A first frequency correction signal (Yr1) is obtained by integrating a signal representative of an error of said phase relative to a reference defined by the input signal. It then cooperates with a second frequency correction signal (Yr2) to correct the frequency of an oscillator (VCO) supplying the output signal. The second frequency correction signal is obtained with the help of an adjustment signal (Yg) by integrating an error of the first frequency correction signal (Yr1) relative to said adjustment signal. The adjustment signal may itself be obtained by integrating a frequency error. The invention is particularly applicable to telecommunications systems.