发明名称 SEMICONDUCTOR STORAGE DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To shorten a time for product testing by releasing deselecting an address latch of a selected block into a deselected state and accessing to a memory cell array after setting all blocks into a selected state in a batch. SOLUTION: An address latch circuit provided in each block of a memory cell array latches all blocks of a memory array 4 into a selected state before deselecting address latches of the selected blocks into a deselected state. Following this, a row decoder 5 accesses the memory arrays 4 in blocks. Thus, all the blocks are latched into a selected state in a batch before an address latching of pre-examined defective blocks can be freed into a deselected state. Therefore, it is eliminated to successively select the blocks one by one except the defective ones, and testing on a batch writing, erasing, and reading of normal blocks can easily be performed.</p>
申请公布号 JPH09288899(A) 申请公布日期 1997.11.04
申请号 JP19960098421 申请日期 1996.04.19
申请人 TOSHIBA CORP 发明人 TANZAWA TORU;TANAKA TOMOHARU
分类号 G01R31/28;G11C16/02;G11C16/04;G11C16/06;G11C17/00;G11C29/00;G11C29/02;H01L21/66;(IPC1-7):G11C29/00 主分类号 G01R31/28
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