| 摘要 |
PROBLEM TO BE SOLVED: To speed up the graphic plotting processing of a system provided with a graphic accelerator by permitting CPU to transfer a command and/or a parameter to a FIFO buffer without referring to a status register until specified hardware interruption is generated. SOLUTION: A graphic processing system 20 on a CPU-side is provided with a graphic accelerator command conversion means 21 and a graphic accelerator command transfer means 22. The graphic accelerator 30 is provided with a first-in first-out(FIFO) buffer 31, a graphic accelerator status register 32 and the like. The CPU-side transfers the command to the FIFO buffer 31 without referring to the status register 32 until hardware interruption showing that the FIFO buffer 31 is in a full state is generated from a graphic accelerator 30-side to the CPU-side at the time of transferring the command from the CPU- side. |
