发明名称 Apparatus for handling failures to provide a safe address translation in an improved input/output architecture for a computer system
摘要 Hardware input/output address translation apparatus adapted for use in a multitasking computer system including hardware responsive to commands from an unprivileged application program addressed to an input/output address for translating the input/output address to a physical address space of an input/output device and transferring the command to the physical address of an input/output device, hardware responsive to commands from an unprivileged application program addressed to an input/output address for selecting from safe translations of input/output addresses to physical address spaces of input/output devices for the first hardware means, and apparatus for handling a failure to provide an address translation.
申请公布号 US5685011(A) 申请公布日期 1997.11.04
申请号 US19950440699 申请日期 1995.05.15
申请人 NVIDIA CORPORATION 发明人 ROSENTHAL, DAVID S. H.;PRIEM, CURTIS
分类号 G06F11/00;G06F12/10;(IPC1-7):G06F3/00 主分类号 G06F11/00
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