发明名称 Self-aligned polycide process that utilizes a planarized layer of material to expose polysilicon structures to a subsequently deposited metal layer that is reacted to form the metal silicide
摘要 The process for forming a layer of metal silicide over polysilicon structures, such as gates and interconnect lines, is simplified by forming a layer of insulation material over the polysilicon structures, removing the layer of insulation material until the layer of insulation material is substantially planar and the thickness of the insulation material over the polysilicon structures is within a predetermined thickness range, etching the planarized layer of insulation material until portions of the polysilicon structures are exposed, depositing a layer of metal over the resulting structure, and then reacting the metal layer with the polysilicon structures to form the layer of metal silicide.
申请公布号 US5683941(A) 申请公布日期 1997.11.04
申请号 US19960678417 申请日期 1996.07.02
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 KAO, DAH-BIN;PIERCE, JOHN
分类号 H01L21/28;H01L21/321;H01L21/768;H01L21/8234;H01L21/8238;(IPC1-7):H01L21/44 主分类号 H01L21/28
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