发明名称 DELAY DETECTION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain the delay detection circuit in which deterioration in a bit error rate characteristic is prevented by eliminating delay differences among IF signals of a plurality of systems so as to eliminate a discontinuous part of a reception signal when an antenna system receiving the signal is switched and to select an IF signal with highest reliability. SOLUTION: Two systems of IF signals IF1, IF2 are respectively given to 1-system and 2-system phase comparators 1, 2, in which the signals are respectively converted into phase information and the information is sampled synchronously with a clock signal whose period is a multiple of four of a symbol rate by 1-system and 2-system re-timing sections 3, 4. The two phase information sets to be sampled are given to a 1-system or 2-system delay detector 5 or 6, in which the phase information with a smaller delay is delayed so as to eliminate the delay difference between the two sets of the information and the information sets are converted into two delayed detection information sets, and a selector section 7 selects the information which has higher reliability. Thus, a discontinuous part of the reception signal caused when the antenna system to receive a signal is switched is eliminated and the delay detection circuit is realized, in which deterioration in a bit error rate characteristic is prevented.
申请公布号 JPH09284188(A) 申请公布日期 1997.10.31
申请号 JP19960097083 申请日期 1996.04.18
申请人 MITSUBISHI ELECTRIC CORP 发明人 KOMOTA NORIO
分类号 H04L27/227;H04B7/08;H04L1/06 主分类号 H04L27/227
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