发明名称 MATCHED FILTER
摘要 PROBLEM TO BE SOLVED: To provide the matched filter executing refreshing for an entire circuit while ensuring an arithmetic speed. SOLUTION: The matched filter is provided with plural auxiliary sample-and- hold circuits SHs able to hold part of analog input voltages to be held by a main sample-and-hold circuit SHm, an adder/subtractor circuit ADD, 2nd adder/ subtractor circuits consisting of circuits equivalent to the adder/subtractor circuit ADD, and a multiplexer MUX1 providing an output of any of the adder/ subtractor circuit or the 2nd adder/subtractor circuits alternatively in addition. Thus, a period to halt any sample-and-hold circuit in the main sample-and-hold circuit SHm and the adder/subtractor circuit is provided to execute refreshment for this period.
申请公布号 JPH09284252(A) 申请公布日期 1997.10.31
申请号 JP19960115719 申请日期 1996.04.12
申请人 YOZAN:KK;SHARP CORP 发明人 HATA GIYOURIYOU;SUZUKI KUNIHIKO;KOTOBUKI KOKURIYOU;SHU NAGAAKI;CHIN TAKASHI
分类号 H04J13/00;G11C27/02;H04B1/7093 主分类号 H04J13/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利