发明名称 CONVOLUTION DECODING CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To improve the throughput of the system while keeping reliability of data after convolution decoding. SOLUTION: A clock signal application means 1 generates a clock signal S0 with a frequency f0 causing the same rate as a transmission rate of a reception signal and provides an output. An N-fold clock signal application means 2 generates a clock signal SN whose frequency is N times the frequency f0 N×f, based on the clock signal S0 and provides an output. A clock signal changeover means 3 selects the clock signal S0 or the clock signal SN and provides an output of a clock signal SX based on a packet signal detection notice signal from a packet signal detection means 5. A convolution decoding means 4 applies convolution decoding to a reception signal in response to the packet signal detection notice signal based on the clock signal SX and provides an output of the result as a decoding signal. The packet signal detection means 5 detects a head and end position of a packet signal from the reception signal.</p>
申请公布号 JPH09284145(A) 申请公布日期 1997.10.31
申请号 JP19960086962 申请日期 1996.04.10
申请人 NEC CORP 发明人 KATAGIRI HIDEKI
分类号 H04L7/04;H03M13/23;(IPC1-7):H03M13/12 主分类号 H04L7/04
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