Simplified contact method for high density CMOS

摘要

Forming an LDD transistor in a Si layer comprises: (a) preparing a Si substrate; (b) forming a gate stack comprising a gate oxide, a gate electrode layer having a gate top surface and a first sacrificial dielectric; (c) patterning the gate stack to define a gate stack column having vertical sidewalls and source and drain regions in the Si layer adjoining the gate stack column; (d) oxidising the vertical sidewalls; (e) depositing a conformal etch resistant dielectric over the gate stack column and the source and drain areas; (f) depositing a second sacrificial dielectric over the conformal dielectric in the gate stack column and the source and drain areas; (g) directionally etching horizontal portions of the second sacrificial dielectric and the conformal dielectric, thereby exposing the first sacrificial dielectric and the source and drain areas and leaving first gate sidewalls including at least the conformal dielectric; (h) removing the first sacrificial dielectric, leaving vertical alignment stubs of the conformal dielectric adjacent extending from the first gate sidewalls above the gate top surface; (i) depositing a protective conformal dielectric having a nominal contact cover thickness above the gate stack column, thereby forming self-aligned protective members about each of the vertical alignment stubs and having a thickness greater than the nominal contact cover thickness; (j) depositing a first interlayer dielectric; (k) etching contact holes above the source and drain regions through the interlayer dielectric and through the protective conformal dielectric to the source and drain regions, whereby a residual thickness of the protective conformal dielectric remains above corners of the gate stack column; and (l) completing the IC.