| 摘要 |
A memory controller is provided to enhance graphics processing efficiency by predicting the next pixel data address. The graphics system includes a memory controller(23) for generating physical addresses based on the address latched from a microprocessor(21), and for generating a plurality of memory control signals and buffer control signals, and a data buffer(22) for latching the data from the microprocessor and for outputting the data to a frame buffer(24) according to the memory control signals. In the memory controller(23), preferably included is a counter(33) for independently counting the column address provided by the microprocessor(21), a row register and column registers(32a, 32b) for latching initial row address and column address provided by the microprocessor, a M-controller(34) for generating the memory control signals, and a B-controller(35) for generating the buffer control signals.
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