| 摘要 |
A fixed-length packet switching system, in which fixed-length packets (cells) (10) each composed of a header portion (12) and a data portion (11) are received from a plurality of input lines (101a - 101n), and after conversion of the header portions, the received packets are transmitted onto selected ones of output lines (130a - 130n) designated by their header portions. The system includes a buffer memory (112, 113) having a first buffer area (112) composed of a plurality of subsidiary areas for accumulating cells correspondingly to the output lines, and a second buffer area (113) for accumulating broadcast cells to be transmitted to selected ones of the plurality of output lines; a packet reading circuit (116a - 116m, 121) for reading the cells from the buffer area successively corresponding to the output lines and for reading the broadcast cell from the second buffer area at a predetermined frequency; and a broadcast control circuit (131) for reproducing a plurality of broadcast cell from the braodcast cell read from the second buffer area and for transmitting the plurality of reproduced broadcast cells, instead of the cells read from the first buffer area, onto the output lines. |
