发明名称 |
FET with gate spacer |
摘要 |
A semiconductor integrated circuit structure and method of fabrication is disclosed. The structure includes a FET gate with adjacent double or triple layered gate spacers. The spacers permit precise tailoring of lightly doped drain junction profiles having deep and shallow junction portions. In addition, a self-aligned silicide may be formed solely over the deep junction portion thus producing a reliable low contact resistance connection to source and drain.
|
申请公布号 |
US5679589(A) |
申请公布日期 |
1997.10.21 |
申请号 |
US19920866942 |
申请日期 |
1992.04.03 |
申请人 |
LUCENT TECHNOLOGIES INC. |
发明人 |
LEE, KUO-HUA;LU, CHIH-YUAN;SUNG, JANMYE |
分类号 |
H01L21/265;H01L21/336;H01L29/78;(IPC1-7):H01L21/336;H01L21/28 |
主分类号 |
H01L21/265 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|