发明名称 |
Memory cell design with vertically stacked crossovers |
摘要 |
A memory cell with vertically stacked crossovers. In prior memory cells, crossover connections within the memory cell were implemented in the same device layer. This wasted valuable design space, since the crossovers were therefore required to sit side-by-side in the layout design. The present invention implements crossovers in different materials on different device layers. The crossovers may therefore be vertically stacked on top of each other, reducing the area of the memory cell. |
申请公布号 |
AU2587097(A) |
申请公布日期 |
1997.10.17 |
申请号 |
AU19970025870 |
申请日期 |
1997.03.20 |
申请人 |
INTEL CORPORATION |
发明人 |
MARK T BOHR;JEFFREY K. GREASON |
分类号 |
H01L27/11;G01C11/34;G11C5/00;G11C11/34;G11C11/40;G11C14/00;G11C15/04;H01L21/8244;H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 |
主分类号 |
H01L27/11 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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