Mikrokontroller zur schnellen Ausführung einer grossen Anzahl von Befehlen, die in Folgen von gleichartigen Befehlen zerlegbar sind

摘要

Microcontroller comprising in particular a central processing unit (10), a set of memories (11, 12), a specialized processing module (13) for performing, in sequence, operations on v variable operands and k operands of parameter type (constant during the sequence), and an arrangement of internal buses (20, 21) for the exchange of addresses and data. The microcontroller further has a local bus (25) reserved for the transfer of data between the processing module (13) and the working memory (12), a data switching multiplexer (26) enabling the selection of data either on the local bus (25) or on the internal data bus (21), to be applied to the data port (121) of the working memory (12), as well as, interposed between the internal address bus (20) and the address port (120) of the working memory (12), an address switching multiplexer (28) and a set of pointer registers (31 to 44) of which at least a portion is arranged as queues: v queues (31-41, 32-42) for the v operands plus one queue (34, 44) for the partial results of an operation.