| 摘要 |
PURPOSE:To eliminate an undesired data caused at the initial state of data output by providing a parallel data inhibit circuit and an output circuit before and after a multiplexer respectively and excluding an undesired data from the multiplexer in advance. CONSTITUTION:When a new serial data output command is inputted externally, a parallel data inhibit circuit 23 and an output circuit 24 are operated to inhibit the input of a new parallel data to the multiplexer 23 and the signal level of the serial data outputted from the multiplexer 3 is attenuated. That is, an undesired data of a maximum n-digit stored in a register of each digit of the multiplexer 8 is excluded from the multiplexer 3 by n-set of clock signal inputs for a data excluding time. When a prescribed preparation time elapses, the input of the clock signal is started and the inputted parallel data is converted into a correct serial data by the multiplexer 3 and outputted. |
