| 摘要 |
<p>A memory control apparatus for compression or expansion of data includes an input end for receiving a signal indicating the data rate of the original data and a second signal indicating the data rate of the target data, a first unit for generating an addressing control signal and a select control signal which vary a write or read address of the memory, in response to the first data rate and the second data rate, and a second unit for generating, in synchronization with the addressing control signal of said first unit, a write enable signal of the memory for controlling compression of the input data or a read enable signal of the memory for controlling expansion of the input data, according to the select control signal and first and second data rates. Thus, the input data can be freely compressed or expanded at any desired ratio.</p> |
