发明名称 MEMORISOSHINOSEIZOHOHO
摘要 A method of fabricating a memory device for improving the reliability of the cell area and the driving capability of the peripheral area is disclosed, wherein the method comprises the steps of forming a cell area and a peripheral area by forming a field oxidation layer over a first conductive semiconductor substrate, forming gate oxidation layers of the different thickness from each other over a surface of the substrate which corresponds to the cell area and the peripheral area through once oxidation process, forming a gate over the gate oxidation layer, and implanting a second conductive impurity ion into the substrate partly covered with the gates as a mask to form highly-doped source/drain areas in the respective cell and peripheral area, thereby forming respective MOS transistors on each of the cell area and the peripheral area.
申请公布号 JP2663107(B2) 申请公布日期 1997.10.15
申请号 JP19940244949 申请日期 1994.09.14
申请人 ERU JII SEMIKON CO LTD 发明人 HYON SAN HEN
分类号 H01L29/78;H01L21/316;H01L21/8234;H01L21/8242;H01L27/088;H01L27/10;H01L27/105;H01L27/108 主分类号 H01L29/78
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