发明名称 |
TAIMINGUCHUSHUTSUKAIRO*SOREORYOSHITATSUSHINSHISUTEMUOYOBITAIMINGUCHUSHUTSUHOHONARABINITSUSHINSOCHI |
摘要 |
Clock timing is extracted from N level, multilevel codes of megabits per second data by determining a baud clock among the N-1 possible clocks synchronized to all the level cross points. A discriminator is used with a clock and if correct information is not obtained, the clock is changed. |
申请公布号 |
JP2664249(B2) |
申请公布日期 |
1997.10.15 |
申请号 |
JP19890141016 |
申请日期 |
1989.06.05 |
申请人 |
HITACHI SEISAKUSHO KK |
发明人 |
KAZAWA TOORU;MYAMOTO YOSHINORI;SUZUKI TOSHIRO;NISHIDA SHIGEO;MASE ICHIRO;MORITA TAKASHI;YAMASHITA SOICHI |
分类号 |
H04L7/033;H03M5/20;H04L25/40;H04L25/49 |
主分类号 |
H04L7/033 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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