| 摘要 |
PROBLEM TO BE SOLVED: To suppress the occurrence of soft errors in a memory cells of SRAM. SOLUTION: A first aluminum wire 33 as a power source line and a fourth aluminum wire 40 as a grounding line are arranged in parallel, and additional transistors P1 and P2 and drive transistors N1 and N2 are arranged between them. The additional transistors P1 and P2 are arranged in an N-type region of a semiconductor substrate 1, and the drive transistors N1 and N2 are arranged in a P-Well region 2. An active region 51 is formed in a boundary portion between the N-type region and P-Well region 2, and a capacity is formed between the active region 51 and the connections between the gates of additional transistors P1 and P2 and the gates of drive transistors N1 and N2 thereby increasing the gate capacity. |
