DATA PROCESSOR

摘要

PROBLEM TO BE SOLVED: To provide a data processor provided with pipeline structure and improving the upper limit of an operation clock frequency. SOLUTION: This data processor parallelly pipeline-process plural pipeline stages by each machine cycle time and with respect to a load instruction with extension instructing a first processing part reading data shorter than a register length from RAM 19 and a second part processing zero-extending or code- extending the data to the register length by a single instruction, the data processor executes the zero-extension or the code-extension at the second processing at a pipeline stream different from a pipeline stream in which the first processing is executed or at a pipeline stage different from a pipeline stage in which reading from the storing part of the first processing is executed.