发明名称 |
SIGNAL-TO-BE-TESTED GENERATOR AND DIGITAL DATA SIGNAL OUTPUT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a signal-to-be-tested generator for which a circuit scale is small and thus the generation probability of malfunctions is also small. SOLUTION: A parallel/serial(P/S) conversion circuit 11 converts parallel data signals PD into serial data signals SD corresponding to clock signals TC for conversion outputted from a phased locked loop(PLL) circuit 12. A sampling signal generation circuit 21 generates sampling signals SP by frequency-dividing the clock signals TC for the conversion. A D flip-flop circuit 22 generates signals CHECK to be tested by sampling the serial data signals SD corresponding to the sampling signals SP. |
申请公布号 |
JPH09270714(A) |
申请公布日期 |
1997.10.14 |
申请号 |
JP19960099682 |
申请日期 |
1996.03.29 |
申请人 |
SONY CORP |
发明人 |
TAKESHITA TORU;KIKUCHI HIDEKAZU |
分类号 |
G01R31/3183;H03M9/00;(IPC1-7):H03M9/00;G01R31/318 |
主分类号 |
G01R31/3183 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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