发明名称 COMPARATOR
摘要 PROBLEM TO BE SOLVED: To drive a capacitive load with a high capacitance at a high speed without causing power consumption and a large sized element by providing a buffer circuit consisting of a 1st inverter with a small input capacitance and a 2nd inverter able to sufficiently drive a capacitive load to a post stage of an output circuit. SOLUTION: A 1st inverter 33 being a component of a buffer circuit 30 is designed to have a smaller input capacitance of about 0.04pF than a capacitance of about 0.1pF of a capacity load 7, and a 2nd inverter 36 is designed to have a charging current of about 7mA higher than that of about 18μA of an output circuit 20 so as to sufficiently drive the capacity load 7. Then a differential amplifier circuit 10 and the output circuit 20 are operated in response to a waveform of an input signal and an intermediate output signal is outputted from the output circuit 20 to the buffer circuit 30 with a current I4. Then the buffer circuit 30 is operated in response to the waveform of the received intermediate output signal and an output signal is outputted from the buffer circuit 30 to the capacitive load 7 with a current I5.
申请公布号 JPH09270684(A) 申请公布日期 1997.10.14
申请号 JP19960075524 申请日期 1996.03.29
申请人 NEC KANSAI LTD 发明人 UEDA TOSHIAKI
分类号 H03K5/24;H03F3/45;H03K19/0175;H03K19/0185;H03K19/0948;(IPC1-7):H03K5/24;H03K19/017;H03K19/018;H03K19/094 主分类号 H03K5/24
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