发明名称 |
Shallow trench isolation in integrated circuits |
摘要 |
The invention concerns fabrication of oxide-filled isolation trenches in integrated circuits. The invention etches a network of trenches in the surface of a uniformly doped wafer which has experienced no substantial processing steps. Such a wafer will have little, if any, surface damage. Such a wafer will etch to the same depth everywhere, because two major factors which affect etching rate are (a) surface damage and (b) doping non-uniformity, and these factors are absent. The trenches are then filled with oxide. They define islands upon which devices (such as transistors) may now be fabricated.
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申请公布号 |
US5677564(A) |
申请公布日期 |
1997.10.14 |
申请号 |
US19960736651 |
申请日期 |
1996.08.21 |
申请人 |
AT&T GLOBAL INFORMATION SOLUTIONS COMPANY;HYUNDAI ELECTRONICS AMERICA;SYMBIOS LOGIC INC. |
发明人 |
MCCORMACK, STEPHEN R.;CHIACCHIA, CHRISTINE H.;KELLEHER, PATRICK J. |
分类号 |
H01L21/76;H01L21/762;H01L21/763;(IPC1-7):H01L29/00 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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