发明名称 |
DRIVE VOLTAGE CONTROL CIRCUIT |
摘要 |
<p>PROBLEM TO BE SOLVED: To realize low power consumption with respect to a circuit in the operating state by revising a drive voltage applied to an operating circuit in response to a frequency of a system clock. SOLUTION: An internal cell area 101 (equivalent to a work area) and an F/V voltage drop circuit 102 (equivalent to drive voltage control circuit) are provided in an integrated circuit 100. Then the F/V voltage drop circuit 102 receives a system clock CLK and a constant voltage power supply V0 from the outside of the integrated circuit 100. Furthermore, the internal cell area 101 is made up of a CMOS transistor(TR) or the like and receives the system clock CLK and an output voltage V1 of the F/V voltage drop circuit 102. The internal cell area 101 uses the output voltage V1 of the F/V voltage drop circuit 102 and is operated by an operating frequency provided by the system clock CLK.</p> |
申请公布号 |
JPH09270690(A) |
申请公布日期 |
1997.10.14 |
申请号 |
JP19960077475 |
申请日期 |
1996.03.29 |
申请人 |
TOSHIBA MICROELECTRON CORP;TOSHIBA CORP |
发明人 |
NISHIMAKI HARUYOSHI;NARA NOBUYOSHI |
分类号 |
G06F1/32;G06F1/08;G11C5/14;G11C11/407;H03K5/19;H03K19/00;(IPC1-7):H03K19/00 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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