| 摘要 |
Provided is a method of packaging multiple integrated circuit chips in a standard semiconductor device package intended for a single chip. In one embodiment, a bottom surface of a larger first chip is attached to a die attach area of a standard semiconductor device package. A bottom surface of a smaller second chip is then attached to a top surface of the first chip. Bonding pads on a top surface of the second chip are electrically coupled to bonding pads on the top surface of the first chip. Bonding pads on the top surface of the first chip are then electrically coupled to bonding pads of the semiconductor device package. A heat spreader may also be positioned between the two chips in order to spread the heat energy generated by the second chip during operation over a wider surface area of the first chip. In a second embodiment, a decal including conductive traces is positioned between the two chips and used to route electrical signals from the bonding pads of one chip to the bonding pads of the other chip. In a third embodiment, bonding pads of a smaller second chip are electrically coupled to a first set of bonding pads on a top surface of a larger first chip using a flip-chip soldering technique. |
