| 摘要 |
PURPOSE:To improve the trailing characteristic by controlling the frequency division ratio of a counter by a basic period succeeding to the basic period of an input digital signal and latching an output signal of a digital low pass filter when the synchronizing period of the input digital signal is detected so as to synthesize the latch output with an output signal of the filter. CONSTITUTION:A correction control pulse generating circuit 14 generating a correction control pulse at the basic period succeeding to the basic period of the input digital signal is provided and an output signal of a digital low pass filter 12 is fed to a filter 13 by the period of correction control pulse. Then the synchronizing region of the input digital signal is detected and the output signal of the digital low pass filter 12 is latched by the detection output to synthesize the latch output with the output signal of the digital low pass filter 12. Thus, the quantization error is reduced and the DC component of the input data is corrected to improve the trailing characteristic. |
