发明名称 Processor device for terminating and creating synchronous transport signals
摘要 In the inbound direction, a tributary processor (32) includes an SPE encoder/decoder for extracting a synchronous payload envelope (SPE) from an STS-1P signal. A path terminator (62) may extract DS3 signals or a matrix payload envelope (MPE) from the STS-1P SPE. A DS1/DS3 extractor (68) generates DS1 signals from either the DS3 or MPE signals. An MPE mapper (70) creates MPE signals from the DS1 signals. A wideband stage interface (74) converts the MPE signals into matrix transport format (MTF) signals for cross-connection in a wideband center stage matrix (22). In the outbound direction, the wideband stage interface (74) receives MTF signals from the wideband center stage matrix (22) and generates MPE signals therefrom. The MPE signals are sent through the MPE mapper (70) in order to extract DS1 signals. The DS1 signals are converted to DS3 signals or another MPE mapping by the DS1/DS3 extractor (68). The path terminator receives DS3 or MPE signals for conversion into an STS-1P SPE. The SPE encoder/decoder creates the STS-1P signals from the STS-1P SPE for transmission to the appropriate interfaced subsystem or network.
申请公布号 US5675580(A) 申请公布日期 1997.10.07
申请号 US19950417102 申请日期 1995.04.05
申请人 DSC COMMUNICATIONS CORPORATION 发明人 LYON, DANIEL P.;SCHRODER, RICHARD;HANSON, GARY D.;READ, E. LAWRENCE;LIN, SHARLENE C.;HANLON, MICHAEL J.;DESCHAINE, STEPHEN A.
分类号 H04J3/00;H04J3/06;H04J3/16;H04J3/22;H04Q3/00;H04Q3/52;H04Q11/04;(IPC1-7):H04L12/52 主分类号 H04J3/00
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