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发明名称
AUTOMATIC LAYOUT METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUITS
摘要
申请公布号
JPH09266254(A)
申请公布日期
1997.10.07
申请号
JP19960074844
申请日期
1996.03.28
申请人
NEC CORP
发明人
HATTORI TETSUYA
分类号
H01L21/822;G06F17/50;H01L21/82;H01L27/04;H01L27/118;(IPC1-7):H01L21/82
主分类号
H01L21/822
代理机构
代理人
主权项
地址
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