发明名称 FABRICATION METHOD OF SEMICONDUCTOR DEVICE AND SILICON SUBSTRATE
摘要 PROBLEM TO BE SOLVED: To limit warp of a silicon substrate to a predetermined value or less without depending on a fabrication apparatus and without using a specific interlayer film process, by constructing a multilayered wiring structure having 3 or more wiring layers such that the silicon substrate provided on the multilayered wiring structure is set to a thickness satisfying a specific equation. SOLUTION: In a fabrication method of a semiconductor device in which there is provided a multilayered wiring structure having 3 or more wiring layers, the thickness of a silicon substrate is assumed to be T, the diameter D, and Line number of wiring layers 11, and the silicon substrate satisfying the following formula: T(μm)>=62.4×D(inch)×[1.6 (n-1)+1.0]<1/2> is used. Herein, an interlayer film between wiring layers is preferably constructed with only a single insulating material. Warp of the silicon substrate after the multilayered wiring structure is provided can be made 100μm or less.
申请公布号 JPH09266206(A) 申请公布日期 1997.10.07
申请号 JP19960074095 申请日期 1996.03.28
申请人 NEC CORP 发明人 ITO SHINYA
分类号 H01L21/3205;H01L23/52;H01L23/538;(IPC1-7):H01L21/320 主分类号 H01L21/3205
代理机构 代理人
主权项
地址