| 摘要 |
A voltage control circuit for a dual voltage bus computer system which reduces the voltage on the first bus during a short circuit on the second bus or removal of power from the second bus so that the instantaneous voltage on the first bus does not exceed the instantaneous voltage on the second bus. The voltage control circuit includes a voltage reducing circuit, including a comparison circuit coupled to the first and second buses, a switch controlled by the comparison circuit for drawing current from the first bus, and a voltage gap determining circuit coupled between the second bus and the comparison circuit which provides a reference voltage to the comparison circuit that is a predetermined fraction of the instantaneous voltage on the second bus. The voltage control circuit may also include a bias circuit coupled to the first bus and a voltage maintenance circuit which maintains operation of the bias circuit for a predetermined time after a removal of power from the first bus in the case of a normal power down of both buses.
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