发明名称 |
High-frequency phase locked loop circuit |
摘要 |
A high-frequency phase locked loop circuit effectively increases the maximum frequency associated with the CMOS technology. The circuit includes a first phase-locked loop sub-circuit having an input and an output, a second phase-locked loop sub-circuit having an input coupled to the input of the first phase-locked loop circuit and an output, and an exclusive-OR circuit having first and second inputs coupled to the outputs of the first and second phase-locked loop sub-circuits and an output. The first and second phase-locked loop may be arranged in parallel or in a master/slave relationship.
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申请公布号 |
US5675620(A) |
申请公布日期 |
1997.10.07 |
申请号 |
US19940329367 |
申请日期 |
1994.10.26 |
申请人 |
AT&T GLOBAL INFORMATION SOLUTIONS COMPANY;HYUNDAI ELECTRONICS AMERICA;SYMBIOS LOGIC INC. |
发明人 |
CHEN, DAO-LONG |
分类号 |
H03L7/22;H03L7/081;H03L7/087;H03L7/23;(IPC1-7):H03D3/24 |
主分类号 |
H03L7/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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