发明名称 |
DIGITAL DEMODULATING CIRCUIT, MAXIMUM DETECTING CIRCUIT, AND RECEPTION DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide the digital demodulating circuit which can operate fast and meet its size reduction and IC-implementation and has a synchronous detecting circuit of high practicability. SOLUTION: A phase comparator 10 generates a momentary phase signal of an input modulated signal with a carry signal from a carry generator 11. A frequency difference detector 13 is supplied with the momentary phase signal in a preamble pattern period through a phase memory circuit 12 after a reproduced clock signal becomes stable, and generates a frequency difference correction signal according to the signal in this period and supplies it to an adder 14 to correct the frequency difference. A phase shift quantity detector 16 after obtaining the phase difference from a reference phase of each symbol generates a histogram, determines the phase difference of the highest frequency as the phase difference from the reference phase of each symbol, and generates and supplies a phase difference correction signal to an adder 17 to remove the phase difference. Data are reproduced from the signal after this removal. |
申请公布号 |
JPH09266499(A) |
申请公布日期 |
1997.10.07 |
申请号 |
JP19960127136 |
申请日期 |
1996.05.22 |
申请人 |
OKI ELECTRIC IND CO LTD |
发明人 |
ISHII YOSHIYUKI;OURA HIDETO;IGUCHI YUJI |
分类号 |
H04L27/22;H04L1/06;H04L27/00;H04L27/233 |
主分类号 |
H04L27/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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