发明名称 Method for forming polish stop layer for CMP process
摘要 A method is disclosed for planarizing interlevel dielectric layers in semiconductor wafers extremely smoothly. The key aspect of the disclosure is a buried stop layer that is ion implanted into the interlevel layer. It is shown that the stop layer can be formed at precise depths from the surface of the oxide layer and in a mostly planar surface. When the oxide layer with the buried stop layer is chemical/mechanically polished in the conventional manner, polishing stops at the stop layer yielding also a planar surface. The planarity of the polished surface can be extremely refined by first forming an extremely refined stop layer. The latter is accomplished by first planarizing the surface of the oxide layer in a number of ways before implanting the stop layer. It is further shown that when nitrogen atoms are used as the species for implanting, the resulting stop layer acquires a hardness very favorable for being differentiated from the softer oxide layer. Such abrupt difference in hardness provides a very precise polishing endpoint. At the same time, overpolishing of the interlevel layer is avoided.
申请公布号 US5674784(A) 申请公布日期 1997.10.07
申请号 US19960720638 申请日期 1996.10.02
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 JANG, SYUN-MING;YU, CHEN-HUA
分类号 H01L21/3105;H01L21/316;(IPC1-7):H01L21/316 主分类号 H01L21/3105
代理机构 代理人
主权项
地址