发明名称 |
MANUFACTURE OF SEMICONDUCTOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To make it possible to from an active silicon layer in desired thickness on a SOI(silicon on insulator) substrate, and to conduct interelement isolation easily in a short time. SOLUTION: A groove 2 of about 3μm in width and about 1μm in depth is formed on the active silicon layer 1c of a SOI substrate 1, and a silicon oxide film 3 of about 3μm is formed by conducting pyrogenic oxidation at about 1100 deg.C for about 1200 minutes in such a manner that the active silicon layer 1c is allowed to reach an insulating film 1b. An element isolation region 4 is formed by polishing and flattening the silicon oxice film 3 until the active silicon layer 1c is exposed using CMP chemical/mechanical polishing method and the like.
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申请公布号 |
JPH09266246(A) |
申请公布日期 |
1997.10.07 |
申请号 |
JP19960072671 |
申请日期 |
1996.03.27 |
申请人 |
MATSUSHITA ELECTRIC WORKS LTD |
发明人 |
TAKANO HITOMICHI;SUZUMURA MASAHIKO;MAEDA MITSUHIDE;SUZUKI YUJI;HAYAZAKI YOSHIKI;SHIRAI YOSHIFUMI;KISHIDA TAKASHI;YOSHIDA TAKESHI |
分类号 |
H01L21/31;H01L21/76;H01L21/762;H01L27/12;(IPC1-7):H01L21/762 |
主分类号 |
H01L21/31 |
代理机构 |
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地址 |
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