发明名称 DOUBLED PROCESSOR
摘要 PROBLEM TO BE SOLVED: To obtain the doubled processor which can absorb the phase difference between ATM cells of an in-use and a stand-by system and cell fluctuation generated on a doubled high-speed transmission line or at the conversion from SDH to cells. SOLUTION: The SDH frames of the in-use and stand-by systems on the high-speed transmission lines are converted by an SDH processing part 121 into cell streams respectively, and when differences in speed between SDHs and cells that are generated in this conversion overlap to four cells, four speed adjusting cells are inserted into the said cell flows. Then they are inputted to the doubled processor 122 and a speed adjusting cell deviation absorbing circuit puts the speed adjusting cells of the cell streams of both the systems in phase with each other. Then MUX 31 divides the cell streams of both the systems into four respectively, and a cell stream selecting circuit 33 confirms the normalcy of the order of the selection system of the cell streams of both the systems and synchronizes both the systems with each other, and then absorbs the phase difference between both the systems by inserting or deleting speed adjusting cells. A switching circuit 34 switches the in-use system and stand-by system with an external switching command. Outputs after the switching are multiplexed by the MUX 35.
申请公布号 JPH09266474(A) 申请公布日期 1997.10.07
申请号 JP19960074355 申请日期 1996.03.28
申请人 MITSUBISHI ELECTRIC CORP;NIPPON TELEGR & TELEPH CORP <NTT> 发明人 OTA HIROSHI;SHIMURA MASAHITO;SATO HIROYUKI;SUZUKI TAKAMASA;OSHIMA KAZUYOSHI
分类号 H04L1/22;H04J3/00;H04J3/06;H04L12/28;H04Q3/00;(IPC1-7):H04L1/22 主分类号 H04L1/22
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