| 摘要 |
<p>PROBLEM TO BE SOLVED: To secure the fast switching operation of an external CPU bus and also the margin against the noises by placing directly a CPU package to a main memory package and connecting directly a CPU to a main memory storage element via a CPU bus. SOLUTION: A CPU 1 is connected to a main memory storage element 2 on a main memory package 13 via a CPU bus 9. The bus 9 has an electrical interface of satisfactorily small voltage amplitude and output current since the wiring length of the bus is fixed and only the CPU 1 and element 2 are connected to the bus. In regard to the access to a peripheral circuit 5, the data transferred via the bus 9 are received by an external CPU bus interface circuit 7 which converts the data into an electrical interface of TTL and CMOS levels slower than the bus 9. A peripheral bus interface circuit 8 which is connected to an external CPU bus 10 converts the data into a peripheral bus 11 and sends it to the circuit 5.</p> |
