发明名称 |
High-speed encoder |
摘要 |
An encoder capable of taking four bits of uncompressed data and encoding the received bits. The encoder in parallel generates one or a plurality of codes if the bits can be represented by a code or by a plurality of codes and keeps the bits that can not be represented by a code unaltered. On the following clock cycle, the unaltered bits from the previous clock cycle will be combined with a new set of four bits of data and the cumulative bits will be converted to a code if they can be represented by a code and if they can not be represented by a code, they will be stored until the next clock cycle. The process of storing the cumulative number of bits is continued until the cumulative number of bits can be represented by a code. <IMAGE> |
申请公布号 |
EP0753829(A3) |
申请公布日期 |
1997.10.01 |
申请号 |
EP19960305024 |
申请日期 |
1996.07.08 |
申请人 |
XEROX CORPORATION |
发明人 |
KAO, JEAN-SWEY;SU, SAM S.;ONG, DANNY T. |
分类号 |
H04N1/417;G06T9/00;H03M7/40 |
主分类号 |
H04N1/417 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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