摘要 |
The device according to the invention comprises a real-time operator OTR behaving, seen from a processor of the structure, like a memory area and comprising means making it possible especially to send and receive data to be processed, to generate control signals for the exchanges, to manage the real-time context of the processors (P1, P2, P3) of the structure. This real-time operator OTR is produced in the form of a plurality of identical hard-wired circuits (OTR1, OTR2, OTR3), called OTR circuits, simultaneously accessible by the processors (P1, P2, P3) of the structure, but each associated with only one of these processors (P1, P2, P3). …<??>The invention may be used even in the case of a structure comprising a high number of processors. …<IMAGE>… |