发明名称 Field effect transistor with lightly doped drain regions
摘要 It is an object of the present invention to provide a structure of a field effect transistor, which effectively suppresses a leakage current from a source/drain region to a substrate side without increasing a parasitic capacitance, and a method of manufacturing the same. According to the present invention, when an LDD structure is to be constituted by forming, in a semiconductor substrate, an active layer of a first conductivity type, a heavily doped layer of the first conductivity type, which is separated from the active layer by a predetermined distance and has a high impurity concentration; and an intermediate concentration layer of the first conductivity type, which is formed between the active layer and the heavily doped layer and has an impurity concentration lower than that of the heavily doped layer, regions of a second conductivity (these regions are converted into depletion layers upon contact with the corresponding regions of the first conductivity), which cover the entire bottom portion of the corresponding region are formed.
申请公布号 US5672890(A) 申请公布日期 1997.09.30
申请号 US19950527226 申请日期 1995.09.12
申请人 SUMITOMO ELECTRIC INDUSTRIES 发明人 NAKAJIMA, SHIGERU
分类号 H01L29/812;H01L21/338;H01L29/08;H01L29/10;(IPC1-7):H01L31/032;H01L31/033;H01L31/072;H01L31/109 主分类号 H01L29/812
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