发明名称 |
Digital transmission signal processing system and recording/reproducing system |
摘要 |
A receiving apparatus for receiving a transmitted bit-compressed signal and a transmitted control signal which controls a performance of a recording apparatus. The transmitted bit-compressed signal and the transmitted control signal are transmitted after adding of a parity signal thereto and effecting modulation thereof. The receiving apparatus includes a reception unit for receiving the transmitted bit-compressed signal and the transmitted control signal, a demodulator for demodulating the bit-compressed signal and the control signal outputted by the reception unit in a manner corresponding to the modulation thereof. An error correcting unit receives the demodulated bit-compressed signal and the demodulated control signal for correcting errors therein in accordance with the parity signal added thereto and for at least outputting an error-correcting bit-compressed signal and an error-corrected control signal. A control circuit is provided for detecting the error-corrected control signal from the error correction unit and for controlling performance of the recording apparatus in response to the detected error-corrected control signal. Furthermore, a bit expansion unit is provided for receiving the error-corrected bit-compressed signal and for bit-expanding the error-corrected bit-compressed signal corresponding to the bit-compression thereof.
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申请公布号 |
US5673154(A) |
申请公布日期 |
1997.09.30 |
申请号 |
US19960620880 |
申请日期 |
1996.03.22 |
申请人 |
HITACHI, LTD. |
发明人 |
ARAI, HIDEO;OWASHI, HITOAKI;HOSOKAWA, KYOICHI;NISHIMURA, KEIZO;WATATANI, YOSHIZUMI;SHIBATA, AKIRA |
分类号 |
G06F11/00;G11B5/00;G11B5/008;G11B5/09;G11B15/00;G11B15/18;G11B15/467;G11B20/00;G11B20/10;G11B27/00;G11B27/032;G11B27/10;H03M13/00;H04N5/775;H04N5/783;H04N5/926;H04N7/26;H04N9/79;H04N9/797;H04N9/804;(IPC1-7):G11B5/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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