发明名称 Semiconductor memory device operating stably under low power supply voltage with low power consumption
摘要 A semiconductor memory device of the present invention includes an internal power supply voltage generating circuit down converting external power supply voltage to generate first and second internal power supply voltages, a Vpp generating circuit generating a high voltage from external power supply voltage by charge pumping operation, and a Vbb generating circuit generating negative voltage from external power supply voltage by charge pumping operation. The first internal power supply voltage is applied to a control circuit and a sense amplifier drive signal generating circuit. The second internal power supply voltage is applied to a circuit generating a bit line equalize/precharge signal. Even if the first internal power supply voltage is made small, the Vpp generating circuit and the Vbb generating circuit generate a prescribed voltage from external power supply voltage. Therefore, these circuits generate a prescribed internal high voltage and negative voltage efficiently and stably. The bit line equalize/precharge signal is at a voltage level higher than the first internal power supply voltage. The bit line equalize/precharge signal can equalize/precharge a bit line at a high speed. As a result, a semiconductor memory device which operates stably with low power consumption is provided.
申请公布号 US5673232(A) 申请公布日期 1997.09.30
申请号 US19950486755 申请日期 1995.06.06
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 FURUTANI, KIYOHIRO
分类号 G11C11/413;G05F1/56;G05F3/24;G11C5/14;G11C11/407;G11C11/4074;G11C11/408;G11C11/409;H01L21/822;H01L27/02;H01L27/04;(IPC1-7):H01L27/04 主分类号 G11C11/413
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