摘要 |
Disclosed is a method of integrated circuit fabrication which includes formation of an additional layer (e.g., 23, 25) of silicon in contact openings which are filled with aluminum (e.g., 21). The additional silicon layer (e.g., 23, 25) is positioned adjacent the aluminum layer to provide silicon for interdiffusion into the aluminum so that junction spiking can be avoided. The additional silicon may be provided by ion implantation or by separately formed layers (e.g., 23, 25). <IMAGE> |
申请人 |
AT & T CORP., NEW YORK, N.Y., US |
发明人 |
CHITTIPEDDI, SAILESH, WHITEHALL, PENNSYLVANIA 1052, US;COCHRAN, WILLIAM THOMAS, NEW TRIPOLI, PENNSYLVANIA 18066, US;KELLY, MICHAEL JAMES, OREFIELD, PENNSYLVANIA 18069, US |