发明名称 Single step process for blanket-selective CVD metal deposition
摘要 <p>The present invention relates generally to an improved apparatus and process for providing uniform step coverage on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron aperture width applications. In one aspect of the invention, a dielectric layer (32) is formed over a conducting member (36). A thin nucleation layer (34) is then deposited onto the dielectric layer (32) prior to etching high aspect ratio apertures through the nucleation and dielectric layers (34, 32) to expose the underlying conducting member (36) on the aperture floor (42). A CVD metal layer (44, 46) is then deposited onto the structure (309 to achieve selective deposition within the apertures, while preferably also forming a blanket layer (46) on the field. The present apparatus and process reduce the number of steps necessary to fabricate CVD metal interconnects and layers that are substantially void-free and planarized. The metallization process is preferably carried out in an integrated processing system that includes both a PVD and CVD process chamber so that once the substrate is introduced into a vacuum environment, the metallization of the apertures to form vias and contacts occurs without the formation of oxides between the layers. &lt;IMAGE&gt;</p>
申请公布号 EP0797249(A1) 申请公布日期 1997.09.24
申请号 EP19970104651 申请日期 1997.03.19
申请人 APPLIED MATERIALS, INC. 发明人 GUO, TED;CHEN, LIANG-YUH;NAIK, MEHUL;MOSLEY, RODERICK CRAIG
分类号 H01L21/285;C23C14/56;C23C16/54;H01L21/28;H01L21/3205;H01L21/677;H01L21/768;H01L23/522;(IPC1-7):H01L21/768 主分类号 H01L21/285
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