发明名称 DEIJITARUHOGOKEIDENSOCHI
摘要 PURPOSE:To find the abnormal state of an input circuit, by changing sampling frequency at multiple steps at the time of inspection, and by comparing the amplitude of output at each frequency with each other. CONSTITUTION:Input A or the like is sample-held by a sample holder 2A or the like via an LPF1A or the like, and is converted to a digital value by an A/D converter 4 via a multiplexer 3. A sampling rate is determined by a timing controlling section 11. At the time of inspection, at a specific frequency, each sampling is executed, and digital converted-values against the same input are compared with each other, and when a difference between the digital converted values at each frequency exceeds a normal value, then an input circuit is to be in an abnormal state.
申请公布号 JP2656534(B2) 申请公布日期 1997.09.24
申请号 JP19880078025 申请日期 1988.04.01
申请人 HITACHI SEISAKUSHO KK 发明人 KIDO MITSUYASU;CHIBA TOMIO;KUDO HIROYUKI
分类号 H02H3/02;H02H3/05 主分类号 H02H3/02
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